Boolean Circuits · NAND Game: Processor (Optional)
Lesson 2
The next step is to decode an instruction word and route its bits to the ALU, destination logic, and jump condition. The gate \(\texttt{SPLIT16}\) takes one 16-bit value and writes its 16 bits from most to least significant.
Problem. Synthesize a circuit of size \(4\) over \(\{\operatorname{NAND}_{2},\allowbreak \operatorname{ALU},\allowbreak \operatorname{CONDITION},\allowbreak \operatorname{SPLIT},\allowbreak \operatorname{AND},\allowbreak \operatorname{ADD},\allowbreak \operatorname{SELECT},\allowbreak \operatorname{INV},\allowbreak 0\}\) computing the decoder function: \[\operatorname{ALUINSTR}(I,A,D,\texttt{*A})=(R,a,d,\texttt{*a},j).\]
There are no explicit inputs, so omit the input-label line; the 16-bit labels \(\texttt{I}\), \(\texttt{A}\), \(\texttt{D}\), and \(\texttt{*A}\) are predefined. Let \(Y=\texttt{A}\) when \(\texttt{I}[12]=0\) and \(Y=\texttt{*A}\) otherwise. The outputs, in order \(\texttt{R a d *a j}\), are \[\begin{aligned}\texttt{R}&=\operatorname{ALU}(\texttt{I}[10],\texttt{I}[9],\texttt{I}[8],\texttt{I}[7],\texttt{I}[6],\texttt{D},Y),\\ (\texttt{a},\texttt{d},\texttt{*a})&=(\texttt{I}[5],\texttt{I}[4],\texttt{I}[3]),\\ \texttt{j}&=\operatorname{CONDITION}(\texttt{I}[2],\texttt{I}[1],\texttt{I}[0],\texttt{R}).\end{aligned}\] Here \(\texttt{R}\) is 16-bit and the other outputs are bits; the remaining instruction bits are ignored. The token \(\texttt{0}\) writes one 16-bit zero.