Lesson 1

A processor employs both types of memory, namely registers and RAM. Registers are directly accessible to the processor and are used to store intermediate values and computation results. In contrast, RAM is capable of storing a substantial amount of data; however, only a single address can be accessed for reading or writing at any given time. In the present processor architecture, two registers, denoted \(A\) and \(D\), are available in addition to a single RAM bank. In this task, you are required to integrate the two registers with the RAM bank into a unified memory system. Here the address input of \(\operatorname{RAM}(st,x,ad,cl)\) may be a 16-bit value; the block uses only its least significant bit, that is, the address modulo \(2\).

Problem. Synthesize a circuit of size \(3\) over \(\{\operatorname{REGISTER}, \operatorname{RAM}, \operatorname{NAND}_{2}, \operatorname{INV}_{1}, \operatorname{AND}_{2}, \operatorname{OR}_{2}, \operatorname{XOR}_{2}\}\) computing the combined-memory function \(\operatorname{MEMORY}(a,d,\texttt{*a},x,cl)=(A,D,\texttt{*A})\): The input-label line is \(\texttt{a d *a cl}\); the 16-bit label \(\texttt{x}\) is predefined; list the 16-bit outputs as \(\texttt{A D *A}\). The flags write \(\texttt{x}\) to register \(\texttt{A}\), register \(\texttt{D}\), and the two-cell RAM at address \(\texttt{A}\bmod 2\), respectively, using the previous clock protocol; several writes may occur together. A simultaneous write to \(\texttt{A}\) and \(\texttt{*A}\) uses the old value of \(\texttt{A}\) as the RAM address. Output \(\texttt{*A}\) is the currently addressed RAM value. All memory starts at \(0\).

The function \(\operatorname{REGISTER}(st,x,cl)\) returns one 16-bit value, and \(\operatorname{RAM}(st,x,ad,cl)\) returns the currently addressed 16-bit value.